中国大学MOOC《机器人操作系统入门》课程代码示例

EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog

中科院软件所XLab的机器人UI交互模块

A serial and parallel logic fault simulator on gate level netlists.

This is a Combinational Circuit Logic Simulation Tool. There is a C++ version and a C version.

Real-time bitstream malware detection using an ML model. Includes feature extraction, Trojan detection, family classification, and embedded inference on PYNQ-supported FPGA boards.